Massive Audio D2500.1 block series User Manual Page 25

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track of the current bit was only 6 bits wide, which supports only operand bit
widths up to 63. We extended the width of this counter to 7 bits to solve this
issue.
ModelSim was also used to verify the functionality of the BCD module. After
uncovering a bug in the percentage of pixels kept during integration, the first
area of investigation was the BCD module, since it was the least tested module.
It was trivial to write a test bench for the module and verify the output was
correct using ModelSim.
7.3 Julia implementations/tests of algorithms
Prior to implementing the perspective transforms on the FPGA, we definitely
wanted to verify the soundness of our approach in software first. We settled
on the use of the Julia programming language for this purpose, though in all
likelihood MATLAB or Python(+numpy/scipy/matplotlib) would have served
just as well. This was by far the most effective means of testing whether an al-
gorithm is correct or not, since one can rely on the benefits of fast debug/iterate
cycles in software. This is particularly true in the case of languages featuring a
REPL (read, evaluate, print loop) based interpreter, such as Julia. Correcting
code is as simple as making some changes, re-including the file in the REPL,
and rerunning. This helped us particularly in the verification of the pixels kept
and perspective params module. As an aside, to avoid using too many lan-
guages for software implementations, we used Julia for our code generator for
the accel lut as well. As a concrete example of a serious bug caught using the
help of our software implementations, we were able to track and correct an error
in the computation of p
1
and p
2
using this method. Essentially, the bug was
an interchange of two terms in the closed form expressions that occurred while
transcribing the closed form solutions we found for p
1
and p
2
from paper to the
computer code.
7.4 Labkit I/O
We wired up the logic analyzer to the accelerometer pins to verify that the acc
module was correctly initializing the accelerometer (e.g. the par to ser module
was producing the correct serial bit stream for the register address and data).
It turned out that the bug in the accelerometer was elsewhere (see the next
section).
7.5 Staring at code/data-sheets
This is definitely a questionable inclusion, and we do not recommend this
method in general. Nevertheless, it is often effective when done correctly and in
the right spirit, since it forces one to rethink and step through the logic again,
questioning all assumptions. For instance, once we confirmed that the divider
implementation was incorrect, we had to examine the divider code line by line.
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